1. Field of the Invention
The present invention relates to a memory module and a memory system including the same, and more particularly relates to a Load Reduced memory module and a memory system including the same.
2. Description of Related Art
A memory module such as a DIMM (Dual Inline Memory Module) has a configuration in which a large number of memory chips such as DRAMs (Dynamic Random Access Memories) are mounted on a module printed circuit board (PCB). Such a memory module is inserted in a memory slot provided on a motherboard, thereby a data transfer is performed between a memory controller and the memory module. In recent years, because a system requires a considerable amount of memory capacity, it is hard to provide the required memory capacity with a single memory module. Therefore, in most cases, the motherboard includes a plurality of memory slots, so that a plurality of memory modules can be mounted on the motherboard.
However, when a plurality of memory modules are mounted on a motherboard, a load capacity of a data line on the motherboard increases, resulting in a degradation of signal quality. Although it does not cause a serious problem when a data transfer rate between the memory controller and the memory module is relatively low, it may cause a serious problem that the data transfer cannot be performed in a proper manner due to the degradation of the signal quality when the data transfer rate increases to a certain level. In recent years, a data transfer rate as high as about 1.6 Gbps to 3.2 Gbps is required, and in order to realize such a high speed data transfer, it is necessary to reduce the load capacity of the data line on the motherboard to a sufficiently low level.
A so-called Fully Buffered memory module is known as a memory module in which the load capacity of the data line can be reduced (Japanese Patent Application Laid-open No. 2008-135597). In a write operation of the Fully Buffered memory module, a dedicated chip called an Advanced Memory Buffer (AMB) once receives all write data supplied from the memory controller, and then the AMB supplies the write data to a predetermined memory chip. A read operation is opposite to the write operation, in which all read data output from a memory chip is once supplied to the AMB, and then the read data is supplied from the AMB to the memory controller. As a result, because the memory controller does not experience the load capacity of each memory chip, the load capacity of the data line is considerably reduced.
However, because the AMB employed in the Fully Buffered memory module is a sophisticated chip, which is relatively expensive, it causes a problem that the cost of the memory module considerably increases. Further, because an interface between the memory controller and the AMB is different from a typical interface between the memory controller and the memory chip in the Fully Buffered memory module, it causes another problem that a conventional memory controller cannot be used as it is.
Because of such a background, a memory module called a Load Reduced memory module has been recently proposed. The Load Reduced memory module is a memory module in which a register buffer is used instead of the AMB. Because the register buffer is a chip that only buffers signals such as data and command/address, it can be provided at low cost. In addition, because an interface between the memory controller and the register buffer has no difference from the typical interface between the memory controller and the memory chip in the Load Reduced memory module, the conventional memory controller can be used as it is.
However, from a result of extensive researches on the Load Reduced memory module by the present inventors, it has been found that, when the data transfer rate is considerably high, simply using a single register buffer is not sufficient to maintain the signal quality on the module PCB. To deal with this problem, the present inventors performed further researches on a Load Reduced memory module in which a considerably high data transfer rate can be realized. The present invention has been achieved as a result of such researches.